1. Field of the Invention
The present invention relates to an image display device for an electro-optical display, and more particularly to an improvement in a flat panel display device in which a semi-conductor drive array is integrated on the substrate constituting the display device.
2. Description of the Prior Art
In the field of image display devices, particularly those for electro-optical displays, there is already known a display device having a semi-conductor drive array as disclosed in the U.S. Pat. No. 3,824,003. In said device, as shown in FIG. 1 hereof, a substrate B is provided with gate lines G.sub.1, G.sub.2, . . . , which are entirely covered in succession with an insulating layer I and a semi-conductor layer SC. Also there are provided source lines S.sub.1, S.sub.2, . . . contacting with said semi-conductor layer SC so as to cross said gate lines G.sub.1, G.sub.2, . . . , and further provided are drains D.sub.1, D.sub.2, D.sub.3, D.sub.4, . . . constituting segment electrodes in the vicinity of the crossing points of said gate lines and source lines.
The above-mentioned semi-conductor SC is formed as a thin layer to constitute a semi-conductor drive array (switching element) as represented by thin film transistors (TFT).
A liquid crystal layer is formed between said substrate having the above-mentioned drive switching elements and a counter substrate having a counter electrode which is, for example, an electrode covering the entire surface, thus constituting an equivalent circuit shown in FIG. 2 hereof.
Said gate lines G.sub.1, G.sub.2, . . . and source lines S.sub.1, S.sub.2, . . . respectively receive scanning signals and signal voltages from suitable row generators (R.sub.1, R.sub.2, . . . , R.sub.n and P.sub.1, P.sub.2, . . . P.sub.n) to perform (row-at-a-time) scanning.
T.sub.11, T.sub.12, T.sub.21, T.sub.22, . . . are thin film transistors (TFT) constituted in the above-explained manner; C.sub.11, C.sub.12, C.sub.21, C.sub.22, . . . are accumulating condensers formed between the gate lines and corresponding drains of said switching element array; and LC.sub.11, LC.sub.12, LC.sub.21, LC.sub.22, . . . are condensers respectively containing liquid crystal layers and formed between said drains D.sub.1, D.sub.2, D.sub.3, D.sub.4, . . . and the grounded counter electrodes (not shown).
Also IEEE Trans. on Electron Devices ED-20, p. 995 (1973) discloses a similar display device of which a part of the segment is shown in plan view in FIG. 3 hereof.
In said device a substrate, for example, made of glass is provided with plural gate lines G.sub.1, G.sub.2, . . . on which is formed a semi-conductor SC separated by an insulating layer not shown. Said semi-conductor is in contact on an end thereof with a source line S.sub.1 and on the other end thereof with a drain D.sub.1 of the display segment. Under and facing said drain D.sub.1 there is provided an electrode P connected to the gate line G.sub.1 and adjacent to the gate line G.sub.2 on which said semi-conductor SC is provided. The equivalent circuit of the above-explained structure is shown in FIG. 4, in which there are shown a thin film transistor T.sub.1 constituted as shown in FIG. 3, a condenser LC.sub.1 containing a liquid crystal layer and formed between said drain D.sub.1 and a grounded counter electrode (not shown), and a storage condenser C.sub.1 formed between the drain of said thin film transistor and the electrode P connected to the gate line G.sub.1 adjacent to the gate line G.sub.2 corresponding to said drain.
In the above-explained circuits the voltage of the course line is supplied to the drain to perform the display at the moment a signal is supplied to a selected gate, with a rise time constant determined by the product of the on-resistance of the semi-conductor and the capacitance (summed capacitances of the condenser containing the liquid crystal layer and the storage condenser).
Such display devices as explained in the foregoing are, however, characterized by certain drawbacks yet to be solved.
For example, in the display device shown in FIG. 1, as represented in the equivalent circuit of FIG. 2, the counter electrode of the storage condenser C.sub.11 is constituted by an addressing gate line while the counter electrode of the liquid crystal-containing condenser LC.sub.11 is grounded. This circuit is activated by rendering the transisor T.sub.11 conductive by a voltage V.sub.1 supplied to the row generator R.sub.1, and a voltage V.sub.2 is supplied to the column generator P.sub.1 to charge the storage condenser with a differential voltage .vertline.V.sub.1 -V.sub.2 .vertline.. The storage condenser is generally designated with a capacity larger than that of the liquid crystal, and said differential charged voltage is retained within a time frame as the voltage applied to the liquid crystal when said voltage V.sub.1 from the row generator R.sub.1 is eliminated and the transistor T.sub.11 becomes highly resistive. However, the capacity component of the liquid crystal is not negligible when the liquid crystal is made thinner and of a high dielectric constant in order to achieve a faster response. In such case, when R.sub.1 returns to a low or grounded voltage, the charged voltages of the condenser C.sub.11 and liquid crystal LC.sub.11 are redistributed between the condensers so that the voltage actually applied to the liquid crystal layer is only determined in a complex manner. Also, as will be seen from FIG. 2, the storage condenser of which the counter electrode constitutes the gate line may receive a negative voltage upon opening of the gate even if the source voltage is at the ground potential. For these reasons there is necessitated a complex signal processing means such as for the addition of a bias or compensating voltage to the source signal in case the counter electrode of the storage condenser is composed of the addressing gate line. Also, another drawback of such display device lies in the difficulty of obtaining a transparent display since the semi-conductor employed in the structure is opaque or has a photoconductive property.
On the other hand, the display device shown in FIG. 3 is superior to the foregoing one in circuit function since, as shown in the equivalent circuit of FIG. 4, the signal voltage at S.sub.1 is accumulated in the condenser C.sub.1 if G.sub.1 is grounded when G.sub.2 is activated, and the determined voltage supplied to S.sub.1 is given to the liquid crystal LC.sub.1 after G.sub.2 is turned off.
Also no functional error arises even when the capacity of the liquid crystal LC.sub.1 is not negligible with respect to that of the condenser C.sub.1, since both condensers have grounded counter electrodes.
However, the display device shown in FIG. 3 requires a more complicated structure, in the portion constituting the thin film transistor, than in the device shown in FIG. 1, thus resulting in a significant difference in the complexity of industrial production. Particularly in case small drains are to be arranged in a high density corresponding to the display pixels, the corresponding miniaturization of the transistors requires elevated pattern precision, thus unfavorably affecting the production yield, reliability, function stability, process time and cost. Also the gate lines, formed in narrow stripes, tend to form line defects and therefore require strenuous quality control in the production process. Furthermore, it is difficult to increase the effective display area since the display cannot be provided on the gate lines.